EE Seminar: Sliding-Window Correlation Attacks Against Encryption Devices with an Unstable Clock
Speaker: Dor Fledel
M.Sc. student under the supervision of Prof. Avishai Wool
Wednesday, March 30th 2018 at 15:30
Room 011, Kitot Bldg., Faculty of Engineering
Sliding-Window Correlation Attacks Against Encryption Devices with an Unstable Clock
Abstract
Power analysis side channel attacks rely on aligned traces. As a counter-measure, devices can use a jittered clock to misalign the power traces. In this paper we suggest a way to overcome this counter-measure, using an old method of integrating samples over time followed by a correlation attack (Sliding Window CPA). We theoretically re-analyze this general method with characteristics of jittered clocks and show that it is stronger than previously believed. We show that integration of samples over a suitably chosen window size actually amplifies the correlation both with and without jitter – as long as multiple leakage points are present within the window. We then validate our analysis on a new data-set of traces measured on a board implementing a jittered clock. Our experiments show that the SW-CPA attack with a well-chosen window size is very successful against a jittered clock counter-measure and significantly outperforms previous suggestions, requiring a much smaller set of traces to correctly identify the crrect key.
