Chip Design Engineer

What you’ll be doing:

  • Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

  • Chip level integrations and connectivity.

  • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

 

What we need to see:

Chip Design Emulation Engineer

 

What you will be doing:

  • The main responsibility is emulation and prototyping of complex chip designs. This includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.

  • The job also requires close collaboration with design, verification, and software engineers to enable embedded software and application software development.

Chip Design Verification Engineer

What you'll be doing:

  • Work in a combined design and verification team which develops core units within the Networking silicon.

  • Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

  • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

 

What we need to see:

Formal Verification Engineer

 

What you'll be doing:

  • In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
  • You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of NVIDIA's core technology.

 

What we need to see:

IT Engineer

What you’ll be doing:

  • Provide best in class service level and compliance

  • Resolve hardware and software issues

  • Onboard new hires from IT aspect / offboard leaving employees

  • Laptops and Desktops installation/deployment

  • Document your efforts, tasks and activities (ticketing system) and assist in the creation and maintaining of all technical documentation

 

What we need to see:

Full Chip STA Engineer

What you will be doing:

  • Be in charge of full chip level STA convergence from early stages to signoff.

  • Take part in Full Chip floor plan design and Netlist creation with aim to optimize timing convergence and work efficiency.

  • Define and optimize, together with CAD, STA signoff flows and methodologies.

  • Digital Partitions' and analog IPs' timing integration, giving feedback and driving convergence.

Physical Design Backend Engineer

What you will be doing:

  • Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

  • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Senior Chip Design Engineer

 

What you'll be doing:

  • Work in a design team that develops core units within the Switch and GPU silicon.

  • Micro-architecture planning for units and modules.

  • Design RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

  • RTL synthesis, timing, supporting verification, and silicon post-TO activities.

Chip Design Student

What you'll be doing:

  • Work in a combined design and verification team which develops some of the Network Adapter silicon core units

  • Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.

  • Partner closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

 

סדנאות הסמכה יישומיות מבית NVIDIA

09 בפברואר 2024, 11:00 - 17:29 
און ליין  
Nvidia DLI

מוזמנים.ות להירשם! 

ההרשמה נפתחה! 

עם פתיחת שנת הלימודים האקדמית, חברת ב-NVIDIA שמחים להציע לסטודנטים.ות בפקולטה למדעים מדוייקים ובפקולטה להנדסה סדנאות הסמכה יישומיות של ארגון הלמידה העמוקה מבית ארגון הלמידה העמוקה של אנבידיה NVIDIA Deep Learning Institute. 

*וכל זה ללא עלות כלל*

הסדנאות הינן טכניות ומאפשרות גישה להרצת קוד על שרתי ענן מואצי GPU, עבור פרויקטים בתחומים מחשוב מואץ ובינה מלאכותית יוצרת (Generative AI).

 

מומחים מטעם NVIDIA מנחים את הסדנאות, וזו הזדמנות עבורכם.ן סטודנטים.ות עם השלמת הסדנא לעבור תהליך הערכה שיקנה לכם הסמכה מוכרת, שתתרום לבניית מסלול הקריירה שלכם.

 

*סטודנטים.ות, חוקרים.ות וסגל עם כתובת מייל ממוסד אקדמי בלבד, רשאים להירשם ולהשתתף בסדנאות.
שימו לב: ניתן להירשם ללא עלות רק לאחת מתוך 2 הסדנאות בלבד.

  • Fundamentals of Accelerated Computing with CUDA Python
    • January 24, 2024 @ 10:00 a.m.-6:00 p.m. IST
  • Generative AI with Diffusion Models
    • February 8, 2024 @ 10:00 a.m.-6:00 p.m. IST

בהצלחה! 

עמודים

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